1. Field of the Invention
This invention relates to a method of depositing a layer onto a wafer adapted for manufacturing a semiconductor device, and particularly to a method capable of preventing particles from being adhered onto the wafer at the time of removing residual charges in a case where plasma CVD is carried out with the wafer held using a single-pole electrostatic chuck.
2. Description of Related Art
As large-scale integration of the semiconductor device has been accelerated, the reduction of the minimum processing size of the circuit pattern formation has been rapidly advanced. For instance, the minimum processing size of the 16M DRAM of approximately 0.5 .mu.m (half micron), the minimum processing size of the 64M DRAM of 0.35 .mu.m (sub-half micron), and the minimum processing size of the 256M DRAM of 0.25 .mu.m (quarter micron) are required.
In these circumstances, particle control is a key element determining reliability and yield of devices. Particularly in CVD, since a depositing reaction product formed in a gaseous phase is deposited not only onto the wafer but also onto peripheral members thereof and the inner wall surface of a deposition chamber, the deposit layer is thickened as time elapses. If the deposit layer is peeled off by such elements as changes in temperature, the particle level in the deposition chamber and on the wafer surface is likely to be deteriorated. If the wafer is fixed onto a wafer support with a clamp having a presser pawl, the presser pawl contacting the wafer peels off a part of a thin layer formed in advance, causing particles.
In order to reduce particle pollution on the wafer surface due to the above elements, a single-wafer CVD device for depositing a layer onto the wafer vertically held in the deposition chamber using an electrostatic chuck has been practically adapted.
The electrostatic chuck is a mechanism for applying a DC voltage to an internal electrode embedded in an insulating member, utilizing a Coulomb's force generated between the insulating member and the wafer set thereon, and thus fixing the wafer by adsorption. The electrostatic chuck is broadly used for the wafer support of a recent low-temperature etcher.
For the electrostatic chuck, several different systems in accordance with whether the wafer is a conductor, a semiconductor or a dielectric, and whether the wafer is grounded or not, are known. A so-called single-pole system is the main stream of the recent electrostatic chuck system. In the single-pole system, if the wafer is a conductor or semiconductor, a DC voltage of predetermined polarity is applied to a single internal electrode in an insulating member and an opposed ground is taken through a plasma and the wall of a processing chamber. In this single-pole system, the wafer cannot be adsorbed onto the wafer support if the plasma is not generated. However, this system has a significant advantage that pressure resistance of the gate oxide layer of the MOS device is not likely to be deteriorated.
FIG. 1 shows a state in which ECR-CVD is carried out with the wafer held on the wafer support using the single-pole electrostatic chuck.
A wafer 3 is held by adsorption onto a single-pole electrostatic chuck 9 defining a vicinity of a wafer setting surface of a wafer support 1, and is heated by a heater 4 and irradiated with a plasma P derived along a divergent magnetic field from a plasma forming chamber, not shown, so that a predetermined material film is formed on the surface of the wafer 3. The single-pole electrostatic chuck 9 is composed of a single internal electrode 2 embedded in an insulating member forming part of the wafer support 1. The internal electrode 2 is connected via a high frequency cut-off filter 8 and a changeover switch 5 to a DC power source circuit. The DC power source circuit has a DC power source 6a capable of applying a positive DC voltage and a DC power source 6b capable of applying a negative DC current, with the DC power sources 6a, 6b connected in parallel and commonly grounded.
In FIG. 1, the internal electrode 2 is electrified with negative charges by being connected to the DC power source 6b, and positive charges and negative charges are induced to the surface of the single-pole electrostatic chuck 9 and to the wafer 3, respectively. The wafer 3 is held by adsorption onto the single-pole electrostatic chuck 9 by a Coulomb's force generated between the negative charges of the wafer 3 itself and the positive charges of the wafer setting surface. The opposed ground is taken through a plasma P and a chamber wall, not shown.
Meanwhile, if the single-pole electrostatic chuck is used, charges remain even though application of the DC voltage is stopped after CVD. Therefore, to release the wafer 3 from the single-pole electrostatic chuck 9, it is necessary to supply a gas not substantially affecting the results of CVD so as to generate a residual charge removing plasma, and to cause the residual charges to leak through the plasma. For in order to shorten the charge removing time, it is a conventional practice to apply to the internal electrode for a short period of time a DC voltage of reverse polarity of the DC voltage used for wafer adsorption so as to mandatorily remove the charges. For instance, if the wafer 3 is adsorbed with the internal electrode 2 connected to the positive DC power source 6a as shown in FIG. 1, the negative DC power source 6b is connected for a short period of time so as to release the wafer 3, as shown in FIG. 2.
However, if the residual charge removing plasma is radiated with the polarity switched of the voltage applied of the single-pole electrostatic chuck immediately after deposition of the layer, the particle level on the wafer is deteriorated as the irradiation time elapses.
FIG. 3 shows a state of particle pollution in which residual charges are removed by generating a plasma of N.sub.2 O gas after ECR-CVD of the silicon oxide thin layer is carried out using an SiH.sub.4 /N.sub.2 O mixed gas. In FIG. 3, the axis of ordinates represents the number of particles having a particle diameter of 0.3 .mu.m or smaller, while the axis of abscissas represents the irradiation time (minute) of N.sub.2 O plasma. As the plasma irradiation time is longer, the number of particles on the wafer increases.
The reason for the above can be considered as follows. In the plasma CVD process, a large amount of particles 7 of reaction products generated in a gaseous phase or reaction products peeled off the inner wall surface of the deposition chamber, not shown, float in the vicinity of the wafer 3 by the effect of the Coulomb's force, as shown in FIG. 1. It is considered that the particle 7 is attracted to the surface of the wafer 3 as shown in FIG. 2 along with polarity inversion of the voltage applied, or is deposited onto the wafer 3 as time elapses in the process of Brownian motion.